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    Pyuvm Series Part 4 : Python Oops Verification Env Projects

    Posted By: ELK1nG
    Pyuvm Series Part 4 : Python Oops Verification Env Projects

    Pyuvm Series Part 4 : Python Oops Verification Env Projects
    Published 1/2025
    MP4 | Video: h264, 1920x1080 | Audio: AAC, 44.1 KHz
    Language: English | Size: 1.21 GB | Duration: 3h 29m

    Step by Step Guide from Scratch

    What you'll learn

    Verification of Combinational Circuit

    Verification of Sequential Circuit

    Verification of UART device

    Verification of SPI device with and without slave

    Verification of I2C device

    Requirements

    Fundamentals of Digital Electronics and Verilog

    Completion of Python for VLSI Engineer P1, P2 and P3 Course or Fundamentals of Python, Python OOPs & COCOTB

    Description

    Welcome to our comprehensive course on Class-Based Python Verification Environment for Digital Design! In this dynamic program, participants will delve into the realm of hardware verification, focusing on UART, SPI, DFF, I2C, FIFO, and combinational multiplier Design Under Test (DUT). Leveraging the power of Python and object-oriented programming, this course equips learners with the essential skills to construct robust verification environments for these key digital components.Throughout the course, participants will gain hands-on experience in creating modular and reusable verification components using Python classes. We will explore the intricacies of UART, SPI, DFF, I2C, FIFO, and combinational multiplier behaviors and implement comprehensive testbenches to verify their functionality. Participants will learn how to create comprehensive verification plans, write effective test cases to ensure a thorough and well-documented verification process.By adopting a class-based approach, participants will develop a deep understanding of the underlying design principles and be well-prepared to handle complex verification scenarios.Key topics include building a scalable testbench architecture, crafting effective stimulus generation and response checking mechanisms, and implementing advanced features such as constrained random testing.Join us on this transformative journey, where you will not only gain expertise in class-based Python verification but also foster a holistic understanding of the digital design verification landscape. Elevate your career by mastering the skills necessary to navigate the complexities of modern digital systems and contribute effectively to the success of digital design projects.

    Overview

    Section 1: Introduction

    Lecture 1 How to use IDE

    Lecture 2 Code

    Lecture 3 Components of Verification Environment

    Lecture 4 Learning Path

    Section 2: Combinational Circuit

    Lecture 5 Design

    Lecture 6 TB Part 1

    Lecture 7 TB Part 2

    Lecture 8 TB Part 3

    Lecture 9 Design Code

    Lecture 10 TB Code

    Lecture 11 Makefile

    Section 3: D-Flipflop

    Lecture 12 Design

    Lecture 13 TB Part 1

    Lecture 14 TB Part 2

    Lecture 15 Design Code

    Lecture 16 TB Code

    Lecture 17 Makefile

    Section 4: FIFO

    Lecture 18 Understanding Design

    Lecture 19 TB part 1

    Lecture 20 TB part 2

    Lecture 21 Design Code

    Lecture 22 TB Code

    Lecture 23 Makefile

    Section 5: SPI

    Lecture 24 SPI Master Design

    Lecture 25 TB Part 1

    Lecture 26 TB Part 2

    Lecture 27 TB Part 3

    Lecture 28 TB Part 4

    Lecture 29 Design Code

    Lecture 30 TB Code

    Lecture 31 Makefile

    Lecture 32 SPI with Slave device Design

    Lecture 33 Testbench COde

    Lecture 34 Design Code

    Lecture 35 Verilog TB

    Lecture 36 TB Code

    Lecture 37 Makefile

    Section 6: I2C

    Lecture 38 Understanding start and stop conditions

    Lecture 39 I2C Write and Read Transactions

    Lecture 40 I2C Master FSM

    Lecture 41 I2C Master

    Lecture 42 I2C Slave

    Lecture 43 TB P1

    Lecture 44 TB P2

    Lecture 45 TB P3

    Lecture 46 Design Code

    Lecture 47 TB Code

    Lecture 48 Makefile

    Section 7: UART

    Lecture 49 Understanding Design P1

    Lecture 50 Understanding Design P2

    Lecture 51 TB P1

    Lecture 52 TB P2

    Lecture 53 Design Code

    Lecture 54 TB Code

    Lecture 55 Makefile

    If you're excited about Python and DUT verification with Python, this is the place for you.