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    Digital Logic Design With Lab Experiments

    Posted By: ELK1nG
    Digital Logic Design With Lab Experiments

    Digital Logic Design With Lab Experiments
    Last updated 8/2025
    MP4 | Video: h264, 1920x1080 | Audio: AAC, 44.1 KHz
    Language: English | Size: 4.17 GB | Duration: 22h 19m

    A Complete Guide to Logic Gates, Boolean Algebra, K-Map, Combinational and Sequential Circuits, Memories, Lab Content.

    What you'll learn

    Students will be able to apply the knowledge of number system,Boolean Algebra,Sequential circuits, Memory Elements used in the development of digital circuits.

    The purpose to make students familiar with modern hierarchy of digital hardware and enlighten them the state-of-the-art computer hardware design methodologies.

    The main emphasis is on the practical concepts and systematic synthesis techniques that can be applied to the design of practical digital systems

    This course covers design of digital systems using standard, small, and medium scale integrated circuits.

    Requirements

    I created this course with absolute beginners in mind. You don’t need any prior knowledge of electronics, programming, or engineering—just curiosity and a willingness to learn.I created this course with absolute beginners in mind. You don’t need any prior knowledge of electronics, programming, or engineering—just curiosity and a willingness to learn.

    Description

    Course Description:Are you curious about how computers, digital systems, and electronic devices work at the most fundamental level? Welcome to Digital Logic Design, a comprehensive course that lays the foundation for understanding the inner workings of modern digital systems.This course is designed for students, engineers, and enthusiasts who want to master the core concepts of digital electronics. You’ll start from the basics — learning about binary number systems, logic gates, and Boolean algebra — and progress toward more advanced topics like combinational and sequential circuit design, flip-flops, counters, and finite state machines.Each topic is explained with clear theory, visual aids, truth tables, circuit diagrams, and practical examples to help you understand not just how digital systems work, but why they work that way. You’ll also learn methods for simplifying logic expressions using Karnaugh Maps and designing efficient digital circuits.By the end of the course, you'll be equipped with the skills to design and analyze digital circuits, which are critical in fields like computer engineering, embedded systems, and VLSI design.No prior experience with digital electronics is required — just curiosity and a willingness to learn. Join now and take your first step into the world of digital hardware design!

    Overview

    Section 1: Introduction

    Lecture 1 Course Intro

    Lecture 2 Course Contents

    Lecture 3 How to download software

    Section 2: Number System

    Lecture 4 Intro

    Lecture 5 Binary to decimal

    Lecture 6 Binary to octal

    Lecture 7 Binary to hexadecimal

    Lecture 8 Octal to binary

    Lecture 9 Octal to decimal

    Lecture 10 Octal to hexadecimal

    Lecture 11 Decimal to binary

    Lecture 12 Decimal to octal

    Lecture 13 Decimal to hexadecimal

    Lecture 14 Hexadecimal to binary

    Lecture 15 Hexadecimal to octal

    Lecture 16 Hexadecimal to decimal

    Lecture 17 Point value conversion

    Lecture 18 Point value into decimal

    Lecture 19 Arithmetic Operation

    Lecture 20 Addition

    Lecture 21 Multiplication

    Lecture 22 Complements

    Lecture 23 1's Complement

    Lecture 24 2's Complement

    Lecture 25 9's Complement

    Lecture 26 10's Complement

    Lecture 27 Subtracting using complement

    Lecture 28 Binary Code Decimal(BCD)

    Lecture 29 Excess 3 code

    Lecture 30 Gray Code

    Lecture 31 Binary to Gray Code

    Lecture 32 Gray Code to Binary

    Lecture 33 ASCII

    Lecture 34 How to use ACSII in DLD

    Section 3: Logic Gate

    Lecture 35 Introduction

    Lecture 36 AND Gate

    Lecture 37 OR Gate

    Lecture 38 Not Gate

    Lecture 39 NAND Gate

    Lecture 40 NOR Gate

    Lecture 41 XOR Gate

    Section 4: Boolean Algebra

    Lecture 42 Introduction

    Lecture 43 Associative Law

    Lecture 44 Absorption Law

    Lecture 45 Commutative Law

    Lecture 46 Distributive Law

    Lecture 47 Identity Law

    Lecture 48 DeMorgan's Law

    Section 5: Boolean Function

    Lecture 49 Introduction

    Lecture 50 Boolean Expression and Diagram

    Lecture 51 Compliments in Boolean Function

    Lecture 52 Axioms, Postulates

    Lecture 53 Cut and Try Procedure

    Lecture 54 Literals

    Lecture 55 Proof By Law

    Section 6: K-Map

    Lecture 56 Introduction

    Lecture 57 2 variable K-Map

    Lecture 58 3 variable K-Map

    Lecture 59 4 variable K-Map

    Lecture 60 5 variable K-Map

    Lecture 61 Don't care

    Lecture 62 SOP,POS Introduction

    Lecture 63 SOP

    Lecture 64 POS

    Section 7: Combinational Logic Circuits

    Lecture 65 Introduction

    Lecture 66 Half Adders

    Lecture 67 Full Adders

    Lecture 68 Full Adder using 2 half adder

    Lecture 69 Half Subtractor

    Lecture 70 Full Subtractor

    Lecture 71 Full Subtractor using 2 half subtractor

    Lecture 72 Multiplexer

    Lecture 73 2x1 MUX

    Lecture 74 4x1 MUX

    Lecture 75 8x1 using 2x1 MUX

    Lecture 76 8x1 using 4x1 MUX

    Lecture 77 16x1 using 4x1 MUX

    Lecture 78 Implementation of Boolean Function using MUX

    Lecture 79 DeMultiplexer

    Lecture 80 Application of DeMultiplexer

    Lecture 81 1x16 DeMUX

    Lecture 82 1x16 using 1x4 DeMUX

    Lecture 83 1x8 DeMUX using boolean function

    Lecture 84 Decoder

    Lecture 85 Application of Decoder

    Lecture 86 3 to 8 Decoder

    Lecture 87 3 to 8 using 2 to 4 Decoder

    Lecture 88 4 to 16 using 3 to 8 Decoder

    Lecture 89 5to 32 using 3 to 8 Decoder

    Lecture 90 Logic circuit implementation in Decoder

    Lecture 91 Encoder

    Lecture 92 Application of Encoder

    Lecture 93 Decimal to BCD Encoder

    Lecture 94 8 to 3 Encoder

    Lecture 95 Priority Encoder

    Section 8: Sequential Logic Circuit

    Lecture 96 Introduction

    Lecture 97 SR Latch using NOR Gate

    Lecture 98 SR Latch using NAND Gate

    Lecture 99 What is Clock

    Lecture 100 Triggering Methods in FlipFlop

    Lecture 101 Difference Between Latch and FlipFlop

    Lecture 102 Intro to SR FlipFlop(Truth Table,Characteristics Table,Excitation Table)

    Lecture 103 Introduction to D FlipFlop(Truth Table,Characteristics Table,Excitation Table)

    Lecture 104 JK FlipFlop

    Lecture 105 Truth Table,Characteristics Table,Excitation Table of JK FlipFlop

    Lecture 106 Race Round Condition or Racing in JK FlipFlop

    Lecture 107 Master Slave JK FlipFlop

    Lecture 108 Intro to T Flipflop(Truth Table,Characteristics Table,Excitation Table)

    Lecture 109 5 Steps for FlipFlop Conversion | JK to D FlipFlop Conversion

    Lecture 110 T FlipFlop to D FlipFlop

    Lecture 111 SR to JK FlipFlop

    Lecture 112 SR to T FlipFlop

    Lecture 113 Difference between Synchronous and Asynchronous Sequential Circuit

    Lecture 114 Introduction to State Table, State Diagram and State Equation

    Lecture 115 Design Procedure for Clocked Sequential Circuit

    Lecture 116 Mealy and Moore State Machines

    Lecture 117 Analysis of Clocked Sequential circuit (with D FlipFlop)

    Lecture 118 Analysis of Clocked Sequential Circuit (with JK FlipFlop)

    Lecture 119 State Reduction and Assignment

    Lecture 120 ASM Chart for Moore State Machine

    Lecture 121 Introduction to Counter

    Lecture 122 Types of Counter

    Lecture 123 3 Bit Up Asynchronous Counter

    Lecture 124 4 Bit Asynchronous Up Counter

    Lecture 125 State Diagram of Counter

    Lecture 126 3 and 4 Bit Asynchronous Down Counter

    Lecture 127 3 and 4 Bit Up/Down Ripple Counter

    Lecture 128 How to Design Synchronous Counter | 2 bit Synchronous Up Counter

    Lecture 129 3 and 4 bit Up/Down Synchronous Counter

    Lecture 130 Ring Counter (Synchronous)

    Lecture 131 Johnson's Counter (Synchronous)

    Lecture 132 Introduction to Register

    Lecture 133 Data Formats and Classification of Register

    Lecture 134 Shift Register (SISO mode)

    Lecture 135 Shift Register (SIPO&PIPO Mode)

    Lecture 136 Shift Register (PISO Mode)

    Section 9: Memory

    Lecture 137 Design of ROM (Read only Memory)

    Lecture 138 Programmable Logic Array (PLA)

    Lecture 139 Programmable Array Logic (PAL)

    Section 10: Lab Experiments

    Lecture 140 Adder

    Lecture 141 Multiplexer

    Lecture 142 Decoder

    Lecture 143 SR Latch

    For everyone ( Electric Engineers, CS, IT ) who want to learn about digital login design