Logic Synthesis for FSM-Based Control Units (repost)
Alexander Barkalov and Larysa Titarenko, "Logic Synthesis for FSM-Based Control Units"
Spr ger | 2009 | ISBN: 3642043089 | 236 pages | PDF | 2 MB
Spr ger | 2009 | ISBN: 3642043089 | 236 pages | PDF | 2 MB
The control unit is one of the most important parts of any digital system responsible for interplay of other system blocks. Very often, the model of a finite state machine (FSM) is used to represent the behaviour of a control unit. Modern computer-aided design tools include a lot of optimal solutions (library cells) for implementation of such regular blocks of digital systems as decoders, multiplexers, parallel multibit adders and so on. But as a rule, control units have an irregular structure which makes impossible to design their logic circuits using the standard library cells. To use these cells, an FSM can be represented by a multilevel model based on the principle of structural decomposition. In multilevel models, for example, multiplexers are used to replace logical conditions, decoders are used to implement microoperations, and different memory blocks are used to transform object codes.