Spacer Engineered FinFET Architectures: High-Performance Digital Circuit Applications
Spacer Engineered FinFET Architectures: High-Performance Digital Circuit Applications by Sudeb Dasgupta, Brajesh Kumar Kaushik, Pankaj Kumar Pal
2017 | ISBN: 1498783597 | English | 154 pages | PDF | 4 MB
2017 | ISBN: 1498783597 | English | 154 pages | PDF | 4 MB
This book focusses on the spacer engineering aspects of novel MOS-based device–circuit co-design in sub-20nm technology node, its process complexity, variability, and reliability issues. It comprehensively explores the FinFET/tri-gate architectures with their circuit/SRAM suitability and tolerance to random statistical variations.