Power-Constrained Testing of VLSI Circuits (Repost)
Nicola Nicolici, Bashir M. Al-Hashimi, "Power-Constrained Testing of VLSI Circuits"
English | 2003 | ISBN: 140207235X | PDF | pages: 191 | 10.7 mb
English | 2003 | ISBN: 140207235X | PDF | pages: 191 | 10.7 mb
This text focuses on techniques for minimizing power dissipation during test application at logic and register-transfer levels of abstraction of the VLSI design flow. It surveys existing techniques and presents several test automation techniques for reducing power in scan-based sequential circuits and BIST data paths.