ESD in Silicon Integrated Circuits (Repost)
ESD in Silicon Integrated Circuits By E. Ajith Amerasekera, Charvaka Duvvury
Publisher: Wiley 2002 | 422 Pages | ISBN: 0471498718 | PDF | 3 MB
Publisher: Wiley 2002 | 422 Pages | ISBN: 0471498718 | PDF | 3 MB
* Examines the various methods available for circuit protection, including coverage of the newly developed ESD circuit protection schemes for VLSI circuits. * Provides guidance on the implementation of circuit protection measures. * Includes new sections on ESD design rules, layout approaches, package effects, and circuit concepts. * Reviews the new Charged Device Model (CDM) test method and evaluates design requirements necessary for circuit protection. This comprehensive reference explains the practical aspects of electrostatic discharge (ESD) and its implications in the design and development of new technologies and integrated circuits. Emphasizes the key issues of reliability and test methods to evaluate protection circuit performance. Various case studies illustrate the effects of diverse design approaches and the full effectiveness of a protection circuit is realized through stress analysis. Concludes with a summary of cutting-edge techniques and prospective future developments.