Heteroepitaxy has evolved rapidly in recent years. With each new wave of material/substrate combinations, our understanding of how to control crystal growth becomes more refined. Most books on the subject focus on a specific material or material family, narrowly explaining the processes and techniques appropriate for each. Surveying the principles common to all types of semiconductor materials, Heteroepitaxy of Semiconductors: Theory, Growth, and Characterization is the first comprehensive, fundamental introduction to the field. This book reflects our current understanding of nucleation, growth modes, relaxation of strained layers, and dislocation dynamics without emphasizing any particular material. Following an overview of the properties of semiconductors, the author introduces the important heteroepitaxial growth methods and provides a survey of semiconductor crystal surfaces, their structures, and nucleation. With this foundation, the book provides in-depth descriptions of mismatched heteroepitaxy and lattice strain relaxation, various characterization tools used to monitor and evaluate the growth process, and finally, defect engineering approaches. Numerous examples highlight the concepts while extensive micrographs, schematics of experimental setups, and graphs illustrate the discussion. Serving as a solid starting point for this rapidly evolving area, Heteroepitaxy of Semiconductors: Theory, Growth, and Characterization makes the principles of heteroepitaxy easily accessible to anyone preparing to enter the field.

"As chip size and complexity continues to grow exponentially, the challenges of functional verification are becoming a critical issue in the electronics industry. It is now commonly heard that logical errors missed during functional verification are the most common cause of chip re-spins, and that the costs associated with functional verification are now outweighing the costs of chip design. To cope with these challenges engineers are increasingly relying on new design and verification methodologies and languages. Transaction-based design and verification, constrained random stimulus generation, functional coverage analysis, and assertion-based verification are all techniques that advanced design and verification teams routinely use today. Engineers are also increasingly turning to design and verification models based on C/C++ and SystemC in order to build more abstract, higher performance hardware and software models and to escape the limitations of RTL HDLs. This new book, Advanced Verification Techniques, provides specific guidance for these advanced verification techniques. The book includes realistic examples and shows how SystemC and SCV can be applied to a variety of advanced design and verification tasks."