Siemens Mentor Tessent 2021.2

Siemens EDA has released Tessent 2021.2 is helps customers address their debug, manufacturing test, yield, functional safety, IC security, and optimization requirements for today’s most complex SoCs.

The Mentor Graphics Tessent product suite is a comprehensive silicon test and yield analysis platform that addresses the challenges of manufacturing test, debug, and yield ramp for today’s SoCs. Built on the foundation of the best-in-class solutions for each test discipline, Tessent brings them together in a powerful test flow that ensures total chip coverage.

Tessent solutions fall into 2 key categories:

TESSENT TEST | Design for Test (DFT) and Yield Learning
DFT and yield learning products for logic, memory and mixed-signal devices. The Tessent Test product suite provides comprehensive silicon test and yield learning applications that addresses the challenges of manufacturing test, debug, and yield ramp.
TESSENT EMBEDDED ANALYTICS | SoC Debug and Analytics
Tessent Embedded Analytics provides solutions for real-time debug and post-deployment analytics for RISC-V-based and other complex SoCs.

Tessent Silicon Lifecycle Solutions


Siemens EDA is headquartered in beautiful Wilsonville, OR, near the HQ office of Opal Kelly. Over the decades, Mentor Graphics had become one of Oregon’s largest software leaders focused on electronic design automation (EDA). Mentor was acquired by Siemens in 2017 and became Siemens EDA. Siemens EDA provides design solutions that enable companies to develop better electronic products faster and more cost-effectively.

Owner: Mentor Graphics Corporation
Product Name: Tessent
Version: 2021.2
Supported Architectures: x86 or x86_64
Website Home Page : https://eda.sw.siemens.com/
Languages Supported: english
System Requirements: Linux *
Size: 2.0 Gb