Cadence LITMUS 23.10.100

Cadence Design Systems, Inc. has unveiled the Cadence Conformal Litmus 23.10.100, the next-generation solution that provides constraints signoff and clock domain crossing (CDC) signoff, reducing overall design cycle times and enhancing the quality of silicon in complex system-on-chip (SoC) designs.

The Conformal Litmus provides customers with:

- The industry’s first signoff static timer integration: With this integration, the Conformal Litmus can accurately model the design and the constraints using the same interpretation as the Tempus Timing Signoff Solution, providing customers with 100% signoff accuracy at the register-transfer level (RTL).
- CDC structural signoff: This verifies structural correctness of CDC in the design from early RTL through implementation flows. Smart analysis and reporting features provide rapid signoff capabilities, potentially saving weeks to months in the design schedule.
- Constraints signoff: Checks for correctness and completeness of constraints at the block level and lets users perform hierarchical block versus top consistency checks at the SoC integration level. The Conformal Litmus smart analysis generates accurate, low-noise reports that shorten debug time and helps users achieve signoff-quality constraints rapidly.
- Multi-CPU parallelisation: Verification can be parallelized across multiple cores, delivering up to 10X faster turnaround time on SoC designs.

Conformal Litmus is a next-generation tool that provides constraint signoff and clock-domain-crossing (CDC) signoff. Like other Cadence tools ending in "-us", it shares the same timing engine. So Litmus uses the same engine as Tempus, Genus, Innovus, and others. This provides 100% signoff timing accuracy at the RTL level. It also makes use of multi-CPU parallelization. Verification can be parallelized across multiple cores, delivering up to 10X faster turnaround time on SoC designs (compared to the previous tool).

INVECAS’ Smart Constraint and CDC Signoff with Cadence’s Conformal Litmus


Ravi Reddy shares his expert insights as lead of INVECAS’ logic and IP development team as they adopted Cadence’s Conformal Litmus solution for constraints and clock domain crossing (CDC) signoff at both RTL and gate levels. Litmus’ integration of the Cadence Tempus timing engine provided full implementation-level accuracy on all critical CDC logic including FIFOs, data, and bus synchronizers.
Cadence is a pivotal leader in electronic systems design, building upon more than 30 years of computational software expertise. The company applies its underlying Intelligent System Design strategy to deliver software, hardware and IP that turn design concepts into reality. Cadence customers are the world’s most innovative companies, delivering extraordinary electronic products from chips to boards to complete systems for the most dynamic market applications, including hyperscale computing, 5G communications, automotive, mobile, aerospace, consumer, industrial and healthcare. For eight years in a row, Fortune magazine has named Cadence one of the 100 Best Companies to Work.

Owner: Cadence
Product Name: Conformal Litmus
Version: 23.10.100 (Base release)
Supported Architectures: x86_64
Website Home Page : www.cadence.com
Languages Supported: english
System Requirements: Linux *
Size: 1.7 Gb