There are three main reasons for writing this book. While several assembly language books are on the market, almost all of them cover only the 8086 processor-a 16-bit processor Intel introduced in 1979. A modem computer organization or assembly language course requires treatment of a more recent processor like the Pentium, which is a 32-bit processor in the Intel family. This is one of the main motivations for writing this book. There are two other equally valid reasons. The book approaches assembly language programming from the high-level language viewpoint. As a result, it focuses on the assembly language features that are required to efficiently implement high-level language constructs. Performance is another reason why people program in assembly language. This is particularly true with real-time application programming. Our treatment of assembly language programming is oriented toward performance optimiza­ tion. Every chapter ends with a performance section that discusses the impact of specific sets of assembly language statements on the performance of the whole program. Put another way, this book focuses on performance-oriented assembly language programming. Intended Use This book is intended as an introduction to assembly language programming using the Intel 80X86 family of processors. We have selected the assembly language of the Intel 80X86 processors (including the Pentium processor) be­ cause of the widespread availability of PCs and assemblers. Both Microsoft and Borland provide assemblers for the PCs.

As the complexity of modern embedded systems increases, it becomes less practical to design monolithic processing platforms. As a result, reconfigurable computing is being adopted widely for more flexible design. Reconfigurable Computers offer the spatial parallelism and fine-grained customizability of application-specific circuits with the postfabrication programmability of software. To make the most of this unique combination of performance and flexibility, designers need to be aware of both hardware and software issues. FPGA users must think not only about the gates needed to perform a computation but also about the software flow that supports the design process. The goal of this book is to help designers become comfortable with these issues, and thus be able to exploit the vast opportunities possible with reconfigurable logic.

Multicore Processors and Systems provides a comprehensive overview of emerging multicore processors and systems. It covers technology trends affecting multicores, multicore architecture innovations, multicore software innovations, and case studies of state-of-the-art commercial multicore systems. A cross-cutting theme of the book is the challenges associated with scaling up multicore systems to hundreds of cores.

This book describes deep learning systems: the algorithms, compilers, and processor components to efficiently train and deploy deep learning models for commercial applications.
The exponential growth in computational power is slowing at a time when the amount of compute consumed by state-of-the-art deep learning (DL) workloads is rapidly growing. Model size, serving latency, and power constraints are a significant challenge in the deployment of DL models for many applications. Therefore, it is imperative to codesign algorithms, compilers, and hardware to accelerate advances in this field with holistic system-level and algorithm solutions that improve performance, power, and efficiency.

This book is a collection of high-quality peer reviewed contributions from the academicians, researchers, practitioners, and industry professionals, accepted in the International Conference on Advances in Data Computing, Communication and Security (I3CS2021) organized by the Department of Electronics and Communication Engineering in collaboration with the Department of Computer Engineering, National Institute of Technology, Kurukshetra, India during 08-10 Sep 2021. The fast pace of advancing technologies and growing expectations of the next-generation requires that the researchers must continuously reinvent themselves through new investigations and development of the new products. The theme of this conference is devised as "Embracing Innovations" for the next-generation data computing and secure communication system.

Multicore Programming Using the ParC Language discusses principles of practical parallel programming using shared memory. It is unique in its approach to writing parallel programs for shared memory machines. It uses a simple yet powerful parallel dialect of C called ParC as the basic programming language, which was co-developed by author Yosi Ben-Asher.